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CLRC63201T View Datasheet(PDF) - NXP Semiconductors.

Part Name
Description
MFG CO.
CLRC63201T
NXP
NXP Semiconductors. NXP
'CLRC63201T' PDF : 127 Pages View PDF
NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
If an external clock source is used, the clock signal must be applied to pin OSCIN. In this
case, be very careful in optimizing clock duty cycle and clock jitter. Ensure the clock
quality has been verified. It must meet the specifications described in Section 13.4.5 on
page 106.
Remark: We do not recommend using an external clock source.
9.9 Transmitter pins TX1 and TX2
The signal on pins TX1 and TX2 is the 13.56 MHz energy carrier modulated by an
envelope signal. It can be used to drive an antenna directly, using minimal passive
components for matching and filtering (see Section 15.1 on page 107). To enable this, the
output circuitry is designed with a very low-impedance source resistance. The TxControl
register is used to control the TX1 and TX2 signals.
9.9.1 Configuring pins TX1 and TX2
TX1 pin configurations are described in Table 26.
Table 26. Pin TX1 configurations
TxControl register configuration
TX1RFEn
FORCE100ASK
0
X
1
0
1
0
1
1
1
1
Envelope TX1 signal
X
LOW (GND)
0
13.56 MHz carrier frequency modulated
1
13.56 MHz carrier frequency
0
LOW
1
13.56 MHz energy carrier
TX2 pin configurations are described in Table 27.
CLRC632
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
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