NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
Table 37. Multiplexed address bus: assembling the register address
Multiplexed
address bus
type
UsePage
Select
Register address
Paging mode 1
PageSelect2 PageSelect1 PageSelect0 AD2
Linear
0
addressing
AD5
AD4
AD3
AD2
AD1 AD0
AD1 AD0
10.2 Register bit behavior
Bits and flags for different registers behave differently, depending on their functions. In
principle, bits with same behavior are grouped in common registers. Table 38 describes
the function of the Access column in the register tables.
Table 38. Behavior and designation of register bits
Abbreviation Behavior
Description
R/W
read and write These bits can be read and written by the microprocessor.
Since they are only used for control, their content is not
influenced by internal state machines.
Example: TimerReload register may be read and written by
the microprocessor. It will also be read by internal state
machines but never changed by them.
D
dynamic
These bits can be read and written by the microprocessor.
Nevertheless, they may also be written automatically by
internal state machines.
Example: the Command register changes its value
automatically after the execution of the command.
R
read only
These registers hold flags which have a value determined by
internal states only.
Example: the ErrorFlag register cannot be written externally
but shows internal states.
W
write only
These registers are used for control only. They may be written
by the microprocessor but cannot be read. Reading these
registers returns an undefined value.
Example: The TestAnaSelect register is used to determine the
signal on pin AUX however, it is not possible to read its
content.
CLRC632
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
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