NXP Semiconductors
CLRC632
Standard multi-protocol reader solution
10.5 Register descriptions
10.5.1 Page 0: Command and status
10.5.1.1 Page register
Selects the page register.
Table 41.
Bit
Symbol
Access
Page register (address: 00h, 08h, 10h, 18h, 20h, 28h, 30h, 38h)
reset value: 1000 0000b, 80h bit allocation
7
6
5
4
3
2
1
0
UsePageSelect
0000
PageSelect[2:0]
R/W
R/W
R/W R/W R/W
Table 42. Page register bit descriptions
Bit
Symbol
Value Description
7
UsePageSelect 1
the value of PageSelect[2:0] is used as the register address
A5, A4, and A3. The LSBs of the register address are
defined using the address pins or the internal address latch,
respectively.
0
the complete content of the internal address latch defines
the register address. The address pins are used as
described in Table 5 on page 8.
6 to 3 0000
-
reserved
2 to 0 PageSelect[2:0] -
when UsePageSelect = logic 1, the value of PageSelect is
used to specify the register page (A5, A4 and A3 of the
register address)
10.5.1.2 Command register
Starts and stops the command execution.
Table 43.
Bit
Symbol
Access
Command register (address: 01h) reset value: x000 0000b, x0h bit allocation
7
6
5
4
3
2
1
0
IFDetectBusy 0
Command[5:0]
R
R
D
Table 44. Command register bit descriptions
Bit
Symbol
Value Description
7
IFDetectBusy -
shows the status of interface detection logic
0
interface detection finished successfully
1
interface detection ongoing
6
0
-
reserved
5 to 0 Command[5:0] -
activates a command based on the Command code.
Reading this register shows which command is being
executed.
CLRC632
Product data sheet
COMPANY PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.7 — 27 February 2014
073937
© NXP Semiconductors N.V. 2014. All rights reserved.
50 of 127