CMX869 View Datasheet(PDF) - CML Microsystems Plc
Part Name
Description
MFG CO.
'CMX869' PDF : 46 Pages View PDF
Low Power V.32 bis Modem
CMX869
5.1 Tx USART
A flexible Tx USART is provided for all modem modes, meeting the requirements of V.14 for the QAM
(V.32bis/V.32/V.22bis/V.22) modem modes.
It can be programmed to transmit continuous patterns, Start-Stop characters, Synchronous unformatted
data or HDLC formatted packets.
In HDLC, Synchronous Data and Start-Stop modes the data to be transmitted is written by the µC into the
C-BUS Tx Data Register. The Tx Data Register can be set to operate in 8 or 16-bit mode by setting the
Tx Mode Register b6 appropriately.
In 16-bit (2 character) mode data written to the Tx Data Register at C-BUS address $E3 will be treated as
two octets, b15-8 which will be transmitted first and b7-0 which will be transmitted second. If there is a
need to transmit a single octet when the Tx Data Register has been set to 16-bit mode this can be
achieved by writing the 8-bit data to C-BUS address $E4 instead of $E3.
If the Tx Data Register has been set to operate in 8-bit (1 character) mode, data should normally be
written to C-BUS address $E3, address $E4 being used to provide for Start-Stop transmit data overspeed
as described later.
If Synchronous Data mode has been selected the 8 data bits of each octet in the Tx Data Buffer are
transmitted serially, the lsb being sent first.
In Start-Stop mode an asynchronous character is transmitted for each octet in the Tx Data Register. Each
character consists of a single Start bit followed by 5, 6, 7 or 8 data bits from the Tx Data Buffer - lsb first -
followed by an optional Parity bit then - normally - one or two Stop bits. The Start, Parity and Stop bits
are generated by the USART as determined by the Tx Mode Register settings and are not taken from the
Tx Data Register.
In HDLC mode the octets from the Tx Data Register are packetized into a HDLC Frame consisting of a
Flag byte (01111110 binary) followed by the data octets themselves, each transmitted lsb first, followed
by a 16-bit Frame Check Sequence followed by another Flag byte to mark the end of the Frame. To
prevent the data or FCS aliasing a Flag byte a binary 0 is inserted in the transmit bit stream after every 5
consecutive 1s in the data and FCS fields. The Flag bytes and FCS are automatically generated by the
CMX869.
Figure 5a Tx USART (in 16 Bit Mode)
© 2003 CML Microsystems Plc
12
D/869/1
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