Low Power V.32 bis Modem
CMX869
Figure 5b Tx USART Output: Start-Stop mode, 8 Data Bits + Parity
Figure 5c HDLC Frame Structure
Every time the contents of the C-BUS Tx Data Register have been transferred to the Tx Data Buffer the
Tx Data Ready flag bit of the Status Register is set to 1 to indicate that new data should be loaded into
the C-BUS Tx Data Register. This flag bit will be cleared to 0 when a new value is loaded into the Tx
Data Register.
If a new value is not loaded into the Tx Data Register in time for the next Tx Data Register to Tx Data
Buffer transfer then the Status Register Tx Data Underflow bit will be set to 1. This bit will be cleared to 0
when a new value is loaded into the Tx Data Register
In Synchronous Data mode the last transmitted byte will be re-transmitted if there is no new data in the
Transmit Data Register. In Start-Stop mode a continuous Stop signal (1) will be transmitted.
In HDLC mode the Status Register Tx Data Underflow bit becoming set to 1 is taken by the CMX869 to
indicate the end of data for a frame. The CMX869 will then transmit the FCS followed by at least one
Flag byte. Flag bytes will continue to be transmitted until a new Frame is started by loading a new value
into the Transmit Data Register.
In all modes the transmitted bit and baud rates are the nominal rates for the selected modem type, with
an accuracy determined by the XTAL frequency accuracy, however for QAM modes V.14 requires that
Start-Stop characters can be transmitted at up to 1% overspeed (basic signalling rate range) or 2.3%
overspeed (extended signalling rate range) by deleting a Stop bit from no more than one out of every 8
(basic range) or 4 (extended range) consecutive transmitted characters.
To accommodate this V.14 requirement the CMX869 allows the controlling µC to reduce the number of
transmitted Stop bits by one for selected characters in QAM Start-Stop modes. To do this, 2 character
mode must be disabled in the Tx Mode Register (b6 set to 0). Characters written to thc C-BUS Tx Data
Register at address $E3 will then be transmitted with the programmed number of Stop bits, but a
character written to $E4 will be transmitted with one less Stop bit than the number programmed in the Tx
Mode Register.
In FSK Start-Stop modes, if the Tx Mode Register is set for 1 character mode (b6 = 0) data written to $E4
will be transmitted with a 12.5% reduction in the length of the Stop bit at the end of that character. In all 8
bit Synchronous Data modes data, written to $E4 will be treated as though it had been written to $E3.
The behaviour is not defined for 16 bit data mode.
The underspeed transmission requirement of V.14 is automatically met by the CMX869 as in Start-Stop
mode it will insert extra Stop bit(s) if it has to wait for new data to be loaded into the C-BUS Tx Data
Register.
The QAM (V.32bis/V.32/V.22bis/V.22) modulators include compatible data scrambler functions that are
automatically enabled as required.
© 2003 CML Microsystems Plc
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