CS8920A View Datasheet(PDF) - Cirrus Logic
Part Name
Description
MFG CO.
'CS8920A' PDF : 144 Pages View PDF
CS8920A
• The ISA bus transitions from powered up to
powered down. When the ISA bus is being
powered down and is decaying to ground, the
ISA reset signal may be asserted. At this
time, the CS8920A will reset. Therefore, be-
fore powering down the ISA bus, the
CS8920A EEPROM should be configured to
allow the CS8920A to be activated in wait-
ing-for-wakeup-frame state.
Note that a "CTRL-ALT-DEL" does not reset the
ISA bus.
During the RESET state, the CS8920A does an
internal hardware reset, ignores all incoming
frames, and reads the EEPROM, includng the
burned-in IEEE address. During reset, the
CS8920A also shuts off the CS8920A ISA bus
drivers. The drivers remain off until MEMR and
MEMW and IOR have all gone high. Also, the
CS8920A does not allow ISA accesses before
EEPROM initialization.
Based on the state of the ISA bus (powered or
not powered), and based on the state of the
WakeupEN bit as read from the EEPROM, the
CS8920A will exit the RESET state and enter
one of the NORMAL, STANDBY, SUSPEND,
or DROPPING PACKETS states, as shown be-
low.
SUSPEND State
In the SUSPEND state, the ISA bus is powered
down, and the WakeupEN bit is set to 1. Typi-
cally, the CPU and chipset clocks will also be
stopped. In this state, the CS8920A remains
powered, discards all non-wakeup frames, and
shuts off the CS8920A ISA bus drivers.
Upon wakeup frame recognition, the CS8920A
generates a signal on the EWAKE pin that can be
connected by jumper to the system power man-
ager. An EWAKE output signal will be a logic
high for approximately 50 to 55 ms. The system
State Entered
NORMAL
DROPPING
PACKET
SUSPEND
STANDBY
WakeupEN bit
from EEPROM
0
0
1
1
ISA bus
powered
not powered
not powered
powered
power manager function can then wake up the
system.
After generating the EWAKE signal, the
CS8920A checks that the ISA bus is still pow-
ered off, and that there is no reset request. If
these conditions are true, the CS8920A returns to
the SUSPEND state. Otherwise, the CS8920A
enters the RESET state. Note that the CS8920A
determines that the ISA bus is powered by look-
ing for MEMR and MEMW and IOR bus signals
being simultaneously low.
In a system with a powered down ISA bus, inter-
rupts must not be enabled (via loading register
17, BusCTL register, bit F from the EEPROM).
STANDBY State
In the STANDBY state, the ISA bus is powered
up, and the CPU is typically operating at a low
clock rate to save power. This state is entered
when either:
• the CS8920A is in NORMAL state, and the
software sets WakeupEN bit to 1; or
• while in RESET state, the CS8920A detects
that the ISA bus is powered and the Wakeu-
pEN bit is set to 1 by the EEPROM.
In this state, the CS8920A is powered up, looks
for wakeup frame, and discards all other frames.
Upon wakeup frame recognition, the CS8920A
can wake up the CPU using either just the
EWAKE pin, or a combination of the EWAKE
pin and an ISA-bus interrupt.
118
DS238PP2
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