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CXP973F064 View Datasheet(PDF) - Sony Semiconductor

Part Name
Description
MFG CO.
CXP973F064
Sony
Sony Semiconductor Sony
'CXP973F064' PDF : 42 Pages View PDF
1 2 3 4 5 6 7 8 9 10 Next
Pin
PF0/EC0
PF1/EC2
Circuit format
EC0, EC2
Internal data bus
IP
CMOS Schmitt input
RD
PF2/SCS1/
NMI
PF3/SI1
Internal data bus
RD
SCS1
NMI
IP
CMOS Schmitt input
PFSL register
("0" after a reset)
NMI input enable
("0" after a reset)
Internal data bus
RD
SI1
IP
CMOS Schmitt input
PFSL register
("0" after a reset)
SO1
SO1 output enable
PF4/SO1
PFSL register
IP
("0" after a reset)
Internal data bus
RD
PF5/SCK1
SCK1
SCK1 output enable
PFSL register
("0" after a reset)
Internal data bus
RD
SCK1
IP
CMOS Schmitt input
10
CXP973F064
After a reset
Hi-Z
Hi-Z
Hi-Z
Hi-Z
Hi-Z
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