DZPD6710VCB View Datasheet(PDF) - Intel
Part Name
Description
MFG CO.
'DZPD6710VCB' PDF : 138 Pages View PDF
PD6710/’22 — ISA-to-PC-Card (PCMCIA) Controllers
7.6
Management Interrupt Configuration
Register Name; Management Interrupt Configuration
Index: 05h
Bit 7
Bit 6
Bit 5
Bit 4
Management IRQ Select
RW:0000
Bit 3
Card Detect
Enable
RW:0
Bit 2
Ready
Enable
RW:0
Register Per: socket
Register Compatibility Type: 365
Bit 1
Bit 0
Battery
Warning
Enable
Battery Dead
Or Status
Change
Enable
RW:0
RW:0
This register controls which status changes may cause management interrupts and at which pin the
management interrupts will appear.
Bit 0 — Battery Dead Or Status Change Enable
0
Battery Dead Or Status Change management interrupt disabled.
1
If Battery Dead Or Status Change is ‘1’, a management interrupt will occur.
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Battery Dead Or Status Change bit (see “Bit 0 — Battery Dead Or Status Change” on page 53) is
‘1’. This allows management interrupts to be generated on changes in level of the BVD1/
-STSCHG pin.
Bit 1 — Battery Warning Enable
0
Battery Warning Change management interrupt disabled.
1
If Battery Warning Change is ‘1’, a management interrupt will occur.
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Battery Warning Change bit (see “Bit 1 — Battery Warning Change” on page 53) is ‘1’. This bit is
ignored when the card socket is in I/O mode.
Bit 2 — Ready Enable
0
Ready Change management interrupt disabled.
1
If Ready Change is ‘1’, a management interrupt will occur.
When this bit is ‘1’, a management interrupt will occur when the Card Status Change register’s
Ready Change bit (see “Bit 1 — Battery Warning Change” on page 53) is ‘1’.
54
Datasheet
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