EDI9LC644V
FIG. 15 SDRAM BURST READ SINGLE BIT WRITE CYCLE @ BURST LENGTH = 2
NOTES:
1. BRSW modes enabled by setting A “High” at MRS (Mode Register Set).
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At the BRSW Mode, the burst length at Write is fixed to “1” regardless of programmed burst length.
2. When BRSW write command with auto precharge is executed, keep it in mind that tRAS should not be violated. Auto precharge is executed at the
burst-end cycle, so in the case of BRSW write command, the next cycle starts the precharge.
White Electronic Designs Corporation • Phoenix AZ • (602) 437-1520
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