EM78862B View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
MFG CO.
'EM78862B' PDF : 40 Pages View PDF
EM78862B
8-Bit RISC Type Microprocessor
After reset, the next instruction will be fetched from Address 000H and the hardware interrupt
is 008H.
After timeout, TCC will go to Address 008H when in GREEN mode or NORMAL mode. When
in SLEEP mode, TCC will run the next instruction after “SLEP” instruction. These two
conditions will set a RF flag.
NOTE
It is very important to save ACC, R3 and R5 when processing an interruption as
illustrated below:
Address
0x08
0x09
0x0A
0x0B
0x0C
0x0D
0x0E
:
:
:
:
:
:
:
:
Instruction
DISI
MOV
SWAP
SWAPA
MOV
MOV
MOV
:
:
MOV
MOV
SWAPA
MOV
SWAPA
RETI
A_BUFFER, A
A_BUFFER
0x03
R3_BUFFER, A
A, 0x05
R5_BUFFER, A
A, R5_BUFFER
0X05,A
R3_BUFFER
0X03,A
A_BUFFER
Remarks
; Disable interrupt
; Save ACC
; Save R3 status
; Save ROM page register
; Return R5
; Return R3
; Return ACC
6.8 LCD Driver
The data bank IC can drive LCD directly and has 60 segments and 9 commons that can drive
a total of 60*9 dots. LCD block is made up of LCD driver; display RAM, segment output pins,
common output pins, and LCD operating power supply pins.
Duty, bias, the number of segment, the number of common and frame frequency are
determined by LCD mode register and LCD control register.
The basic structure contains a timing control which uses the basic frequency 32.768KHz or
RC to generate the proper timing for different duty and display access. RE register is a
command register for LCD driver. The LCD display (disable, enable, & blanking) is controlled
by LCD_C and the driving duty and bias is decided by LCD_M. The display data is stored in
data RAM which address and data access are controlled by registers IOCB and IOCC.
This specification is subject to change without further notice.
Mar.01.2005 (V1.1)23 of 36
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