0×08
0×09
0×0A
0×0B
0×0C
0×0D
0×0E
:
:
:
:
:
:
DISI
MOV
SWAP
SWAPA
MOV
MOV
MOV
:
:
MOV
MOV
SWAPA
MOV
SWAPA
RETI
A_BUFFER, A
A_BUFFER
0x03
R3_BUFFER, A
A, 0x05
R5_BUFFER, A
A, R5_BUFFER
0X05,A
R3_BUFFER
0X03,A
A_BUFFER
EM78862C
8-Bit RISC Type Microprocessor
;Disable interrupt
;Save ACC
;Save R3 status
;Save ROM page register
;Return R5
;Return R3
;Return ACC
6.9 LCD Driver
The IC can drive LCD directly and has 32 segments and 16 commons that can drive a
total of 32*16 dots. LCD block is made up of LCD driver; display RAM, segment output
pins, common output pins, and LCD operating power supply pins.
The basic structure (as illustrated in Figs 11, 12, & 13) contains a timing control which
uses the basic frequency 32.768kHz or RC to generate the proper timing for display
access. RE register is a command register for LCD driver. The LCD display (disable,
enable, & blanking) is controlled by LCD_C and the driving duty and bias is decided by
LCD_M. The display data is stored in data RAM which address and data access are
controlled by registers RA Page1 and RB Page1.
32.768kH z C rystal or R C
L C D T im in g C ontrol
R A Page 1 (Address)
R B Page 1 (D ata)
LCD RAM
RE Page 0
LCD_C1~0
LC D _M 1~0
LC D 1/16 D uty C ontrol
D isplay D ata C ontrol
B ias C ontrol
LC D C O M M O N C ontrol
LC D S EG M E N T C ontrol
DC / DC
COM
SEG
Fig. 11 LCD Driver Control Block
Product Specification (V2.1) 07.13.2005
(This specification is subject to change without further notice)
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