EM78862C
8-Bit RISC Type Microprocessor
6.10 Code Options
The EM78862C IC has a built-in CODE option register that is not a part of the normal
program memory. The option bits cannot be accessed during normal program
execution.
Bit 0
OSCSEL
Bit 0 (OSCSEL): Oscillator option
0: RC mode
1: Crystal mode
RC or crystal oscillator is selected by OSCSEL bit of code option.
6.11 Instruction Set
Each instruction in the instruction set is a 13-bit word divided into an OP code and one
or more operands. Normally, all instructions are executed within one single instruction
cycle (one instruction consists of 2 oscillator periods).
Unless the program counter is changed by instructions "MOV R2, A," "ADD R2, A," or
by instructions of arithmetic or logic operation on R2 (e.g., "SUB R2, A," "BS(C) R2, 6,"
"CLR R2," etc.). Under this condition, the execution takes two instruction cycles.
If for some reasons, the specification of the instruction cycle is not suitable for certain
applications, try modifying the instruction as follows:
a) Change one instruction cycle to consist of 4 oscillator periods.
b) Execute within two instruction cycles, "JMP," "CALL," "RET," "RETL," & "RETI," or
the conditional skip ("JBS," "JBC," "JZ," "JZA," "DJZ," & "DJZA") instructions which
were tested to be true. Also execute within two instruction cycles the instructions
that are written to the program counter.
Furthermore, the instruction can provide the following features:
Every bit of any register can be set, cleared, or tested directly.
The I/O register can be regarded as a general register. That is, the same instruction
can operate on the I/O register.
Product Specification (V2.1) 07.13.2005
(This specification is subject to change without further notice)
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