EM78P569 View Datasheet(PDF) - ELAN Microelectronics
Part Name
Description
MFG CO.
'EM78P569' PDF : 58 Pages View PDF
EM78P569
8-bit OTP Micro-controller
VII.10 Dual sets of PWM (Pulse Width Modulation)
(1) Overview
In PWM mode, both PWM1 and PWM2 pins produce up to a 10-bit resolution PWM output (see. Fig.17
for the functional block diagram). A PWM output has a period and a duty cycle, and it keeps the output in
high. The baud rate of the PWM is the inverse of the period. Fig.18 depicts the relationships between a
period and a duty cycle.
Fosc
1:2
1:8
1:32
1:64
MUX
T1P0 T1P1 T1EN
Data Bus
Fosc
1:2
1:8
1:32
1:64
T2P0 T2P1 T2EN
MUX
DT1H
+
DT1L
DL1H + DL1L latch
Comparator
TMR1H + TMR1L
reset
Comparator
PRD1
To PWM1IF
Duty Cycle
Match
RQ
S
IOC6
PWM1
Period
Match
Data Bus
DT2H
+
DT2L
DL2H + DL2L latch
To PWM2IF
Comparator
Duty Cycle
Match
PWM2
TMR2H + TMR2L
reset
RQ
S
Comparator
PRD2
Period
Match
IOC6
Fig.17 The Functional Block Diagram of the Dual PWMs
Period
Duty Cycle
DT1 = TMR1
PRD1 = TMR1
Fig.18 The Output Timing of the PWM
(2) Increment Timer Counter ( TMRX: TMR1H/TWR1L or TMR2H/TWR2L )
TMRX are ten-bit clock counters with programmable prescalers. They are designed for the PWM module
as baud rate clock generators. TMRX can be read, written, and cleared at any reset conditions. If
employed, they can be turned down for power saving by setting T1EN bit [PWMCON<4>] or T2EN bit
[PWMCON<5>] to 0.
__________________________________________________________________________________________________________________________________________________________________
* This specification is subject to be changed without notice.
46
8/19/2004 V4.4
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