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EVAL-AD5100EBZ View Datasheet(PDF) - Analog Devices

Part Name
Description
MFG CO.
'EVAL-AD5100EBZ' PDF : 36 Pages View PDF
AD5100 REGISTER MAP
Table 11 outlines the AD5100 register map, used to configure
and control all parameters and functions in the AD5100, and
indicates whether registers are writable, readable, or permanently
settable. All registers have the same address for read and write
operations.
The AD5100 ships from the factory with default power-up values
set in OTP memory. These default values are different for each
AD5100 model. However, nonprogrammed samples are avail-
able for evaluation purposes. The user can experiment with
different settings in the various threshold, delay, and
configuration registers.
AD5100
Once evaluation is complete, the user should contact Analog
Devices with their desired OTP memory default values. Analog
Devices will create an AD5100 model with the desired default
settings and factory program the AD5100 OTP memory with
these defaults.
Some users may use the AD5100 as a set-and-forget device, that
is, program some default values and never need to change these
over the life of the application. However, some users may require
on-the-fly flexibility, that is, the ability to change settings to
values other than those they choose as their defaults. Register
writing, reading, OTP, and override are explained in the I2C
Serial Interface section.
Table 11. AD5100 Register Map
Register Read/ Permanently
Address Write Settable
0x01
R/W Yes
0x02
R/W Yes
0x03
R/W Yes
0x04
R/W Yes
0x05
R/W Yes
0x06
R/W Yes
0x07
R/W Yes
0x08
R/W Yes
Register Name and Bit Description
V1MON overvoltage threshold
Bit No. Description
[3:0]
Four bits used to program V1MON OV threshold
[7:4]
Reserved
V1MON undervoltage threshold
Bit No. Description
[3:0]
Four bits used to program V1MON UV threshold
[7:4]
Reserved
V2MON turn-on threshold
Bit No. Description
[3:0]
Four bits used to program V2MON on threshold
[7:4]
Reserved
V2MON turn-off threshold
Bit No. Description
[3:0]
Four bits used to program V2MON off threshold
[7:4]
Reserved
V3MON RESET Threshold
Bit No. Description
[2:0]
Three bits used to program V3MON RESET threshold
[7:3]
Reserved
V4MON RESET threshold
Bit No. Description
[2:0]
Three bits used to program V4MON RESET threshold
[7:3]
Reserved
V1MON OV/UV triggered SHDN hold (t1SD_HOLD)
Bit No. Description
[2:0]
Three bits used to program V1MON OV/UV triggered SHDN hold time
[7:3]
Reserved
V1MON OV/UV triggered SHDN delay (t1SD_DELAY)
Bit No. Description
[2:0]
Three bits used to program V1MON OV/UV triggered SHDN delay
time
[7:3]
Reserved
NonOTP Power-On
Default 1
0x00 (18.00 V)
0x00 (8.43 V)
0x00 (7.47 V)
0x00 (6.95 V)
0x00 (2.93 V)
0x00 (7.54 V)
0x00 (200 ms)
0x00 (1200 ms)
Rev. A | Page 23 of 36
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