EVAL-AD5382EBZ View Datasheet(PDF) - Analog Devices
Part Name
Description
MFG CO.
'EVAL-AD5382EBZ' PDF : 40 Pages View PDF
Data Sheet
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
AD5382
FIFO EN 1
CLR 2
VOUT24 3
VOUT25 4
VOUT26 5
VOUT27 6
SIGNAL_GND4 7
DAC_GND4 8
AGND4 9
AVDD4 10
VOUT28 11
VOUT29 12
VOUT30 13
VOUT31 14
REFGND 15
REFOUT/REFIN 16
SIGNAL_GND1 17
DAC_GND1 18
AVDD1 19
VOUT0 20
VOUT1 21
VOUT2 22
VOUT3 23
VOUT4 24
AGND1 25
PIN 1
IDENTIFIER
AD5382
TOP VIEW
(Not to Scale)
75 RESET
74 DB7
73 DB6
72 DB5
71 DB4
70 DB3
69 DB2
68 DB1
67 DB0
66 REG0
65 REG1
64 VOUT23
63 VOUT22
62 VOUT21
61 VOUT20
60 AVDD3
59 AGND3
58 DAC_GND3
57 SIGNAL_GND3
56 VOUT19
55 VOUT18
54 VOUT17
53 VOUT16
52 AVDD2
51 AGND2
Figure 8. 100-Lead LQFP Pin Configuration
Table 8. Pin Function Descriptions
Mnemonic
Function
VOUTx
Buffered Analog Outputs for Channel x. Each analog output is driven by a rail-to-rail output amplifier operating at a
gain of 2. Each output is capable of driving an output load of 5 kΩ to ground. Typical output impedance is 0.5 Ω.
SIGNAL_GND(1–4) Analog Ground Reference Points for Each Group of Eight Output Channels. All SIGNAL_GND pins are tied together
internally and should be connected to the AGND plane as close as possible to the AD5382.
DAC_GND(1–4)
Ground Reference point for the Internal 14-Bit DAC. Each group of eight channels contains a DAC_GND pin. These
pins should be connected to the AGND plane.
AGND(1–4)
Analog Ground Reference Point. Each group of eight channels contains an AGND pin. All AGND pins should be
connected externally to the AGND plane.
AVDD(1–4)
Analog Supply Pins. Each group of eight channels has a separate AVDD pin. These pins are internally shorted and
should be decoupled with a 0.1 µF ceramic capacitor and a 10 µF tantalum capacitor. Operating range for the
AD5382-5 is 4.5 V to 5.5 V; operating range for the AD5382-3 is 2.7 V to 3.6 V.
DGND
Ground for All Digital Circuitry.
DVDD
Logic Power Supply. Guaranteed operating range is 2.7 V to 5.5 V. It is recommended that these pins be decoupled
with 0.1 µF ceramic and 10 µF tantalum capacitors to DGND.
REFGND
Ground Reference Point for the Internal Reference.
REFOUT/REFIN
Reference Output when the Internal Reference is Selected. The AD5382 contains a common REFOUT/REFIN pin. If the
application requires an external reference, it can be applied to this pin, and the internal reference can be disabled via
the control register. The default for this pin is a reference input.
MON_OUT
Monitor Output. When the monitor function is enabled, this pin acts as the output of a 36-to-1 channel multiplexer
that can be programmed to multiplex one of Channels 0 to 31 or any of the monitor input pins (MON_IN1 to
MON_IN4) to the MON_OUT pin. The MON_OUT pin’s output impedance is typically 500 Ω and is intended to drive a
high input impedance like that exhibited by SAR ADC inputs.
Rev. D | Page 15 of 40
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