AD5761R/AD5721R
Data Sheet
Table 13. Bipolar Output Range Possible Codes
Straight Binary
Decimal Code
1111
7
1110
6
1101
5
1100
4
1011
3
1010
2
1001
1
1000
0
0111
−1
0110
−2
0101
−3
0100
−4
0011
−5
0010
−6
0001
−7
0000
−8
Twos Complement
0111
0110
0101
0100
0011
0010
0001
0000
1111
1110
1101
1100
1011
1010
1001
1000
READBACK CONTROL REGISTER
The readback control register operation provides the contents of the control register by setting the register address to 1100. Table 14
outlines the 24-bit shift register for this command, where the last 16 bits are don’t care bits.
During the next command, the control register contents are shifted out of the SDO pin with the MSB shifted out first. Table 15 outlines
the 24-bit data read from the SDO pin, where DB23 is the first bit shifted out.
Table 14. Readback Control Register, 24-Bit Shift Register to the SDI Pin
MSB
DB[23:21]
DB20
DB[19:16]
Register address
XXX1
0
1100
LSB
DB[15:0]
Register data
Don’t care
1 X is don’t care.
Table 15. Readback Control Register, 24-Bit Data Read from the SDO Pin
MSB
LSB
DB[23:21] DB20 DB[19:16]
DB[15:13] DB12 DB11 DB[10:9] DB8 DB7 DB6 DB5 DB[4:3] DB[2:0]
Register address
Register data
XXX1
0
1100
XXXX1
SC
BO CV[1:0]
OVR B2C ETS IRO PV[1:0] RA[2:0]
1 X is don’t care.
Table 16. Readback Control Register Bit Descriptions
Bit Name
Description
SC
Short-circuit condition. The SC bit is reset at every control register write.
0: no short-circuit condition detected
1: short-circuit condition detected
BO
Brownout condition. The BO bit is reset at every control register write.
0: no brownout condition detected
1: brownout condition detected
Rev. C | Page 30 of 36