GL640USB-A View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL640USB-A' PDF : 39 Pages View PDF
GL640USB, GL640USB-A
0: No carry-out from the 4th low order bit
CA: Carry/Borrow bit
1: A carry-out from the most significant bit
0: No carry-out from the most significant bit
Value on POR: “- - 0 - - 0 0 0”
INDAR: (Address 04h/84h, Indirect address register)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
INDAR7 INDAR6 INDAR5 INDAR4 INDAR3 INDAR2 INDAR1 INDAR0
Any instruction using the INDF register actually accesses the register pointed by the INDAR
register.
Value on POR: “x x x x x x x x” [1]
Note 1: “x” means unknown
PORT1 (Address 06h, Port 1 data register)
R/W
R/W
R/W
R/W
R/W
PORT1. PORT1. PORT1. PORT1. PORT1.
4
3
2
1
0
PORT1 is a 5-bit latch for Port 1. Reading the PORT1 register reads the status of the pins whereas
writing to it will write to the port latch. All write operations are read-modify-write operations.
Value on POR: “- - - x x x x x”
PORT2 (Address 07h, Port 2 data register)
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
PORT2. PORT2. PORT2. PORT2. PORT2. PORT2. PORT2. PORT2.
7
6
5
4
3
2
1
0
PORT2 is an 8-bit latch for Port 2. Reading the PORT2 register reads the status of the pins
whereas writing to it will write to the port latch. All write operations are read-modify-write
operations.
Value on POR: “x x x x x x x x”
PCHBUF (Address 0Ah/8Ah, Write buffer of Program Counter’s bit 10-8)
R/W
R/W
R/W
Revision 1.1
-13-
Jun. 7, 1999
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