GL640USB-A View Datasheet(PDF) - Genesys Logic

Part Name

Description

MFG CO.

GL640USB-A

IEEE-1284 to USB Bridge

Genesys Logic 

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GL640USB, GL640USB-A

AnCHK

ACTIVE

WRCHK

GLTHFLT -

- This bit is used to select the type of EPP read engine

1 – EPP engine will check An pin before starting an EPP cycle.

0 – EPP engine doesn’t check An pin , n=0~2

- Select the An pin polarity

1 – active high for data ready 0 – active low for data ready

- Select EPP check status during write or read

1- Check during EPP write cycle

0 – check during EPP read cycle

Filter glitches on WAIT_

1- Enable filter, performance maybe slow down

0 – Disable filter

EPPAD ( offset 9Fh )

R/W

R/W

R/W

R/W

R/W

R/W

R/W

EPPAD7

EPPAD6

EPPAD5

EPPAD4

EPPAD3

EPPAD2

EPPAD1

This register is used to set/read pins D7-0.

To set D7-0, except writing EPPAD, the ADOE bit of EPPCTL register is set to 1

Read this register can get the status of pins D7-0.

R/W

EPPAD0

Revision 1.1

-21-

Jun. 7, 1999

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