GL640USB-A View Datasheet(PDF) - Genesys Logic
Part Name
Description
MFG CO.
'GL640USB-A' PDF : 39 Pages View PDF
GL640USB, GL640USB-A
TXCNT3-0 -
TXSEQ
TXOE -
number of bytes to send
- 0 - TX DATA0
1 - TX DATA1
ready to transmit control data
CTLDAT ( offset 15h )
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
FFDAT7 FFDAT6 FFDAT5 FFDAT4 FFDAT3 FFDAT2 FFDAT1 FFDAT0
This register is the window to push/pop data from endp0/3 FIFO. Write to push FIFO, read to pop.
MISC ( offset 16h )
R/O
R/O
R/O
R/O
R/O
W/O
R/W
SUSPD
ADDR
DEFLT
POWER
Reserved
FFRST0
SF
Default = 8’h10
This register is mainly used in testing purpose.
SUS_DIS - Disable suspend detection
SF
- Short frame mode, used in suspend detection
0=normal mode, needs 3ms bus idle to enter suspend mode
1=short frame mode, needs only 200us to enter suspend mode
FFRST0 - Reset endpoint 0 FIFO read/write pointer.
Data in FIFO remain unchanged.
POWER - Device is in the powered state
DEFLT - Device is in the default state
ADDR - Device is in the address state
SUSPD - Device is in the suspend state
R/W
SUS_DIS
GPIO ( offset 17h )
R/W
GPIO7
R/W
GPIO6
R/W
GPIO5
R/W
GPIO4
R/W
GPIO3
R/W
GPIO2
R/W
GPIO1
GPIOCTL ( offset 18h )
R/W
GPIO7OE
R/W
GPIO6OE
R/W
GPIO5OE
R/W
GPIO4OE
R/W
GPIO3OE
R/W
GPIO2OE
R/W
GPIO1OE
Revision 1.1
-25-
Jun. 7, 1999
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