HT48R065G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R065G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
Note:
PFDC: I/O or PFD selection
0: I/O
1: PFD
LXTLP: LXT oscillator low power control function
0: LXT Oscillator quick start-up mode
1: LXT Oscillator Low Power Mode
CLKMOD: system clock mode selection
0: High speed - HIRC oscillator used as system clock
1: Low speed - LXT oscillator used as system clock, HIRC oscillator stopped
For HT48R064G/HT48R065G devices, this bit is available if the oscillator configuration options
have selected the HIRC+LXT.
If the PWMn output is selected by the PWMCn bit, the PWM clock source fTP always comes from the system
clock source fSYS. The fTP clock is the clock source for timer0, timer 1, time base and PWM.
· CTRL0 Register - HT48R066G
Bit
7
6
5
Name
PCFG PFDCS
¾
R/W
R/W
R/W
¾
POR
0
0
0
4
3
2
1
0
¾
PFDEN1 PFDEN0 LXTLP CLKMOD
¾
R/W
R/W
R/W
R/W
0
0
0
0
0
Bit 7
Bit 6
Bit 5~4
Bit 3~2:
Bit 1
Bit 0
PCFG: I/O configuration
0: INTB/TC0/PFD pin-shared with PA3/PA2/PA0
1: INTB/TC0/PFD pin-shared with PC5/PC4/PC3
PFDCS: PFD clock source
0: Timer 0
1: Timer 1
unimplemented, read as ²0²
PFDEN[1:0]: PFD/PFDB enable/ disable
00: Both disable
01: unimplemented, read as ²0²
10: PFD enable
11: PFD and PFDB enable
LXTLP: LXT oscillator low power control function
0: LXT oscillator quick start-up mode
1: LXT oscillator Low Power Mode
CLKMOD: System clock mode selection
0: High speed - HIRC used as system clock
1: Low speed - LXT used as system clock, HIRC oscillator stopped
This clock mode selection is only valid if the oscillator configuration option has selected the
HIRC+LXT.
Rev. 1.10
35
October 23, 2012
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