HT48R065G View Datasheet(PDF) - Holtek Semiconductor

Part Name

Description

MFG CO.

HT48R065G

Enhanced I/O Type MCU with OPA

Holtek Semiconductor 

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HT48R064G/065G/066G/0662G

Enhanced I/O Type 8-Bit OTP MCU with OPA

Operating Modes

By using the LXT low frequency oscillator in combination with a high frequency oscillator, the system

can be selected to operate in a number of different modes. These Modes are Normal, Slow, Idle and

Sleep.

Mode Types and Selection

HT48R064G/HT48R065G/HT48R066G

For these devices, if the LXT oscillator is used then the internal RC oscillator, HIRC, must be used as

the high frequency oscillator. If the HXT or the ERC oscillator is chosen as the high frequency system

clock then the LXT oscillator cannot be used as they share the same oscillator pins. The CLKMOD bit

in the CTRL0 register can be used to switch the system clock from the high speed HIRC oscillator to

the low speed LXT oscillator. When the HALT instruction is executed and the device enters the

Idle/Sleep Mode the LXT oscillator will always continue to run. For these devices the LXT crystal is

connected to the OSC1/OSC2 pins and LXT will always run (the LXTEN bit is not used). Note that

CLKMOD is only valid in HIRC+LXT oscillator configuration for HT48R064G/HT48R065G/

HT48R066G.

HT48R0662G

For the device the LXT oscillator can run together with any of the high speed oscillators, namely the

HXT, ERC or the HIRC. The CLKMOD bit in the CTRL0 register can be used to switch the system

clock from the selected high speed oscillator to the low speed LXT oscillator. When the HALT

instruction is executed the LXT oscillator can be chosen to run or not using the LXTEN bit in the

CTRL2 register.

Note that CLKMOD is only valid in HIRC+LXT oscillator configuration.

HXT

fH X T

ERC

fE R C

H IR C

f H IR C

C o n fig u r a tio n o p tio n

C LK M O D

( D e te r m in e N o r m a l/

S lo w M o d e )

( N o r m a l)

M UX

M UX

fS Y S

LX T

fL X T

C o n fig u r a tio n o p tio n

(S L O W )

L IR C

f L IR C

fS Y S /4

M UX

T o w a tc h d o g tim e r

System Clock Configurations

For all devices, when the system enters the Sleep or Idle Mode, the high frequency system clock will

always stop running. The accompanying tables shows the relationship between the CLKMOD bit, the

HALT instruction and the high/low frequency oscillators. The CLMOD bit can change normal or Slow

Mode.

Rev. 1.10

41

October 23, 2012

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