HT48R065G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R065G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
Watchdog Time-out Reset during Normal Operation
The Watchdog time-out Reset during normal operation is the same as a hardware RES pin reset except
that the Watchdog time-out flag TO will be set to ²1².
W D T T im e - o u t
In te rn a l R e s e t
tR S T D + tS S T
Note: tRSTD is power-on delay, typical time=50ms
WDT Time-out Reset during Normal Operation Timing Chart
Watchdog Time-out Reset during Idle/Sleep Mode
The Watchdog time-out Reset during Idle/Sleep mode is a little different from other kinds of reset.
Most of the conditions remain unchanged except that the Program Counter and the Stack Pointer will
be cleared to ²0² and the TO flag will be set to ²1². Refer to the A.C. Characteristics for tSST details.
W D T T im e - o u t
tS S T
In te rn a l R e s e t
WDT Time-out Reset during Idle/Sleep Timing Chart
Note: The tSST can be chosen to be either 128 or 2 clock cycles via configuration option if the system clock
source is provided by ERC or HIRC. The SST is 128 for HXT or LXT.
Reset Initial Conditions
The different types of reset described affect the reset flags in different ways. These flags, known as
PDF and TO are located in the status register and are controlled by various microcontroller operations,
such as the Idle/Sleep function or Watchdog Timer. The reset flags are shown in the table:
TO PDF
RESET Conditions
0
0 Power-on reset
u
u RES or LVR reset during Normal or Slow Mode operation
1
u WDT time-out reset during Normal or Slow Mode operation
1
1 WDT time-out reset during Idle or Sleep Mode operation
Note: ²u² stands for unchanged
The following table indicates the way in which the various components of the microcontroller are
affected after a power-on reset occurs.
Item
Program Counter
Interrupts
WDT
Timer/Event Counter
Prescaler
Input/Output Ports
Stack Pointer
Condition After RESET
Reset to zero
All interrupts will be disabled
Clear after reset, WDT begins counting
Timer Counter will be turned off
The Timer Counter Prescaler will be cleared
I/O ports will be setup as inputs
Stack Pointer will point to the top of the stack
Rev. 1.10
48
October 23, 2012
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