HT48R065G View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT48R065G' PDF : 126 Pages View PDF
HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
INTC0 Register - HT48R065G/HT48R0662G
Bit
7
Name
¾
R/W
¾
POR
¾
6
5
4
3
2
1
0
T1F
T0F
INTF
T1E
T0E
INTE
EMI
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
unimplemented, read as ²0²
T1F: Timer/Event Counter 1 interrupt request flag
0: inactive
1: active
T0F: Timer/Event Counter 0 interrupt request flag
0: inactive
1: active
INTF: External interrupt request flag
0: inactive
1: active
T1E: Timer/Event Counter 1 interrupt enable
0: disable
1: enable
T0E: Timer/Event Counter 0 interrupt enable
0: disable
1: enable
INTE: external interrupt enable
0: disable
1: enable
EMI: Master interrupt global enable
0: disable
1: enable
INTC0 Register - HT48R066G
Bit
7
Name
¾
R/W
¾
POR
¾
6
5
4
3
2
1
0
T1F
T0F
EIF
ET1I
ET0I
EEI
EMI
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
unimplemented, read as ²0²
T1F: Timer/Event Counter 1 interrupt request flag
0: inactive
1: active
T0F: Timer/Event Counter 0 interrupt request flag
0: inactive
1: active
EIF: External interrupt request flag
0: inactive
1: active
ET1I: Timer/Event Counter 1 interrupt enable
0: disable
1: enable
ET0I: Timer/Event Counter 0 interrupt enable
0: disable
1: enable
EEI: External interrupt enable
0: disable
1: enable
EMI: Master interrupt global enable
0: disable
1: enable
Rev. 1.10
84
October 23, 2012
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