HT48R064G/065G/066G/0662G
Enhanced I/O Type 8-Bit OTP MCU with OPA
A u to m a tic a lly C le a r e d b y IS R
M a n u a lly S e t o r C le a r e d b y S o ftw a r e
A u to m a tic a lly D is a b le d b y IS R
C a n b e E n a b le d M a n u a lly
P r io r ity
E x te rn a l In te rru p t
IN T E
EM I
H ig h
R e q u e s t F la g IN T F
T im e r /E v e n t C o u n te r 0
T0E
EM I
In te r r u p t R e q u e s t F la g T 0 F
T im e r /E v e n t C o u n te r 1 *
T1E
EM I
In te r r u p t R e q u e s t F la g T 1 F
T im e B a s e In te r r u p t
TBE
EM I
R e q u e s t F la g T B F
M u lti- F u n c tio n In te r r u p t
M FE
EM I
R e q u e s t F la g M F F
Low
In te rru p t
P o llin g
C o m p a ra to r In te rru p t
R e q u e s t F la g C F
O P A 0 In te rru p t
R e q u e s t F la g A 0 F
O P A 1 In te rru p t
R e q u e s t F la g A 1 F
ECI
E A 0I
E A 1I
* : T im e r /E v e n t C o u n te r 1 in te r r u p t is fo r
H T 4 8 R 0 6 5 G /H T 4 8 R 0 6 6 2 G o n ly .
Interrupt Scheme
Main
Program
Main
Program
Interrupt Request or
Interrupt Flag Set by Instruction
N
Enable Bit Set ?
Y
Automatically Disable Interrupt
Clear EMI & Request Flag
Wait for 2 ~ 3 Instruction Cycles
ISR Entry
RETI
(it will set EMI automatically)
Interrupt Flow
Rev. 1.10
86
October 23, 2012