HT49R10A-1 View Datasheet(PDF) - Holtek Semiconductor
Part Name
Description
MFG CO.
'HT49R10A-1' PDF : 38 Pages View PDF
HT49R10A-1/HT49C10-1
The PFD output signal function is controlled by the PA3 data register and the timer/event counter state. The PFD output
signal frequency is also dependent on the timer/event counter overflow period. The definitions of PFD control signal
and PFD output frequency are listed in the following table.
Timer
OFF
OFF
ON
ON
Timer Preload Value
X
X
N
N
PA3 Data Register
0
1
0
1
PA3 Pad State
U
0
PFD
0
PFD Frequency
X
X
fINT/[2´(256-N)]
X
Note: ²X² stands for unused
²U² stands for unknown
D a ta B u s
W r ite D a ta
C h ip R e s e t
P F D ( P A 3 o n ly )
B Z ( P A 1 o n ly )
B Z ( P A 0 o n ly )
D a ta B it
DQ
CK Q
S
P u ll- H ig h
O p tio n
C M O S /N M O S
O p tio n
M
U
X
P F D o r B Z O p tio n
V DD
W eak
P u ll- u p
P A 0 /B Z
P A 1 /B Z
PA2
P A 3 /P F D
R e a d D a ta
S y s te m W a k e -u p
W a k e - u p O p tio n
PA0~PA3 Input/Output Ports
D a ta B u s
W r ite D a ta
C h ip R e s e t
D a ta B it
DQ
CK Q
S
V DD
W eak
P u ll- u p
P A 4~P A 7
R e a d D a ta
S y s te m W a k e -u p
W a k e - u p O p tio n
PA4~PA7 Input/Output Ports
V DD
W eak
P u ll- u p
D a ta B u s
PB0
PB2
R e a d D a ta
PB Input Port
Rev. 1.50
18
July 30, 2012
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