HT66F016/HT66F017/HT68F016/HT68F017
HT66F016R/HT66F017R/HT68F016R/HT68F017R
Wake-up
After the system enters the SLEEP or IDLE Mode, it can
be woken up from one of various sources listed as fol-
lows:
· An external reset
· An external falling edge on Port A
· A system interrupt
· A WDT overflow
If the system is woken up by an external reset, the de-
vice will experience a full system reset, however, if the
device is woken up by a WDT overflow, a Watchdog
Timer reset will be initiated. Although both of these
wake-up methods will initiate a reset operation, the ac-
tual source of the wake-up can be determined by exam-
ining the TO and PDF flags. The PDF flag is cleared by a
system power-up or executing the clear Watchdog
Timer instructions and is set when executing the ²HALT²
instruction. The TO flag is set if a WDT time-out occurs,
and causes a wake-up that only resets the Program
Counter and Stack Pointer, the other flags remain in their
original status.
Each pin on Port A can be setup using the PAWU regis-
ter to permit a negative transition on the pin to wake-up
the system. When a Port A pin wake-up occurs, the pro-
gram will resume execution at the instruction following
the ²HALT² instruction. If the system is woken up by an
interrupt, then two possible situations may occur. The first
is where the related interrupt is disabled or the interrupt is
enabled but the stack is full, in which case the program
will resume execution at the instruction following the
²HALT² instruction. In this situation, the interrupt which
woke-up the device will not be immediately serviced, but
will rather be serviced later when the related interrupt is fi-
nally enabled or when a stack level becomes free. The
other situation is where the related interrupt is enabled
and the stack is not full, in which case the regular inter-
rupt response takes place. If an interrupt request flag is
set high before entering the SLEEP or IDLE Mode, the
wake-up function of the related interrupt will be disabled.
Programming Considerations
The high speed and low speed oscillators both use the
same SST counter. For example, if the system is woken
up from the SLEEP0 Mode and both the HIRC and LIRC
oscillators need to start-up from an off state. The LIRC
oscillator uses the SST counter after HIRC oscillator has
finished its SST period.
· If the device is woken up from the SLEEP0 Mode to
the NORMAL Mode, the high speed system oscillator
needs an SST period. The device will execute first in-
struction after HTO is ²1². At this time, the LIRC oscilla-
tor may not be stability. The same situation occurs in
the power-on state. The LIRC oscillator is not ready yet
when the first instruction is executed.
· If the device is woken up from the SLEEP1 Mode to
NORMAL Mode, and the system clock source is from
HXT oscillator and FSTEN is ²1², the system clock can
be switched to the LIRC oscillator after wake up.
· There are peripheral functions, such as WDT and
TMs, for which the fSYS is used. If the system clock
source is switched from fH to fL, the clock source to the
peripheral functions mentioned above will change ac-
cordingly.
· The on/off condition of fSUB and fS depends upon
whether the WDT is enabled or disabled.
Rev. 1.40
39
November 22, 2016