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ICS1893CFILF View Datasheet(PDF) - Integrated Circuit Systems

Part Name
Description
MFG CO.
ICS1893CFILF
ICST
Integrated Circuit Systems ICST
'ICS1893CFILF' PDF : 126 Pages View PDF
ICS1893CF Data Sheet - Release
Chapter 9 DC and AC Operating Conditions
9.5.4 100M MII: Synchronous Transmit Timing
Table 9-11 lists the significant time periods for the 100M MII Interface synchronous transmit timing. The
time periods consist of timings of signals on the following pins:
TXCLK
TXD[3:0]
TXEN
TXER
Figure 9-5 shows the timing diagram for the time periods.
Table 9-11. 100M MII / 100M Stream Interface: Synchronous Transmit Timing
Time
Period
t1
t2
Parameter
TXD[3:0], TXEN, TXER Setup to TXCLK Rise
TXD[3:0], TXEN, TXER Hold after TXCLK Rise
Conditions
Min.
15
0
Typ.
Max. Units
ns
ns
Figure 9-5. 100M MII / 100M Stream Interface Synchronous Transmit Timing Diagram
TXCLK
TXD[3:0]
TXEN
TXER
t1
t2
ICS1893CF, Rev. F, 03/01/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
106
Mar. 2007
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