ICS1893CFILF View Datasheet(PDF) - Integrated Circuit Systems
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MFG CO.
'ICS1893CFILF' PDF : 126 Pages View PDF
ICS1893CF Data Sheet - Release
Chapter 9 DC and AC Operating Conditions
9.5.6 100M/MII Media Independent Interface: Synchronous Receive Timing
Table 9-13 lists the significant time periods for the MII / 100M Stream Interface synchronous receive timing.
The time periods consist of timings of signals on the following pins:
• RXCLK
• RXD[3:0]
• RXDV
• RXER
Figure 9-7 shows the timing diagram for the time periods.
Table 9-13. MII Interface: Synchronous Receive Timing
Time
Period
Parameter
t1 RXD[3:0], RXDV, and RXER Setup to RXCLK Rise
t2 RXD[3:0], RXDV, and RXER Hold after RXCLK Rise
Min. Typ. Max. Units
10.0 –
10.0 –
–
ns
–
ns
Figure 9-7. MII Interface Synchronous Receive Timing Diagram
RXCLK
RXD[3:0]
RXDV
RXER
t1
t2
ICS1893CF, Rev. F, 03/01/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
108
Mar. 2007
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