ICS1893CF Data Sheet Rev. F - Release
Chapter 9 DC and AC Operating Conditions
9.5.5 10M MII: Synchronous Transmit Timing
Table 9-12 lists the significant time periods for the 10M MII synchronous transmit timing. The time periods
consist of timings of signals on the following pins:
• TXCLK
• TXD[3:0]
• TXEN
• TXER
Figure 9-6 shows the timing diagram for the time periods.
Table 9-12. 10M MII: Synchronous Transmit Timing
Time
Period
t1
t2
Parameter
TXD[3:0], TXEN, TXER Setup to TXCLK Rise
TXD[3:0], TXEN, TXER Hold after TXCLK Rise
Conditions
–
–
Min.
375
0
Typ.
–
–
Max. Units
–
ns
–
ns
Figure 9-6. 10M MII Synchronous Transmit Timing Diagram
TXCLK
TXD[3:0]
TXEN
TXER
t1
t2
ICS1893CF, Rev. F, 03/01/07
Copyright © 2007, Integrated Device Technology, Inc.
All rights reserved.
107
Mar. 2007