IR3Y48A1
1. Register name
2. Register address
[Write]
Test (1)
A3 A2 A1 A0
1000
3. Register bit assignment
Default
Functions
ADIN test mode
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
XXX0 0 0 0 0 0 0
<->
NOTE :
D5 to D0 must always be "0".
X : Don't care
4. Register operations
ADIN test mode
CONTROLS
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
OPERATIONS
0
Normal operation
1
VCOM centered ADIN for AC coupling
The Test register (D6) is for the AC coupled ADIN
input mode. At this mode, the DC bias becomes the
VCOM voltage and no clamp signals are required.
Connect a 50 k$ resistor between the ADIN (pin
14) and CLPCAP (pin 13), and input the signal to
the ADIN pin via a capacitor.
1. Register name
2. Register address
[Write]
Test (2)
A3 A2 A1 A0
1001
3. Register bit assignment
Default
Functions
Test modes
D9 D8 D7 D6 D5 D4 D3 D2 D1 D0
XXXXX0 0 0 0 0
<------------------->
NOTE :
D4 to D0 must always be "0".
X : Don't care
22