IS42S16128-10T View Datasheet(PDF) - Integrated Silicon Solution
Part Name
Description
MFG CO.
IS42S16128-10T
Integrated Silicon Solution
'IS42S16128-10T' PDF : 75 Pages View PDF
IS42S16128
Precharge
The precharge command sets the bank selected by pin A9
to the precharged state. This command can be executed
at a time tRAS following the execution of an active com-
mand to the same bank. The selected bank goes to the
idle state at a time tRP following the execution of the
precharge command, and an active command can be
executed again for that bank.
If pin A8 is low when this command is executed, the bank
selected by pin A9 will be precharged, and if pin A8 is
HIGH, both banks will be precharged at the same time.
This input to pin A9 is ignored in the latter case.
ISSI ®
Read Cycle Interruption
Using the Precharge Command
A read cycle can be interrupted by the execution of the
precharge command before that cycle completes. The
delay time (tRQL) from the execution of the precharge
command to the completion of the burst output is the clock
cycle of CAS latency.
CAS Latency
tRQL
3
2
3
2
CLK
COMMAND READ A0
tRQL
PRE 0
I/O
DOUT A0 DOUT A1 DOUT A2
READ (CA=A, BANK 0) PRECHARGE (BANK 0)
CAS latency = 2, burst length = 4
HI-Z
CLK
tRQL
COMMAND READ A0
PRE 0
I/O
READ (CA=A, BANK 0)
CAS latency = 3, burst length = 4
DOUT A0 DOUT A1 DOUT A2
PRECHARGE (BANK 0)
HI-Z
28
Integrated Silicon Solution, Inc. — 1-800-379-4774
Rev. A
03/13/00
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