LH28F320BFHE-PBTLZ2 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH28F320BFHE-PBTLZ2' PDF : 36 Pages View PDF
LHF32FD2
21
1.2.4 AC Characteristics - Read-Only Operations(1)
VCC=2.7V-3.6V, TA=-40°C to +85°C
Symbol
Parameter
Notes Min.
tAVAV
Read Cycle Time
80
tAVQV
Address to Output Delay
tELQV
CE# to Output Delay
3
tAPA
Page Address Access Time
tGLQV
OE# to Output Delay
3
tPHQV
RST# High to Output Delay
tEHQZ, tGHQZ CE# or OE# to Output in High Z, Whichever Occurs First
2
tELQX
CE# to Output in Low Z
2
0
tGLQX
OE# to Output in Low Z
2
0
tOH
Output Hold from First Occurring Address, CE# or OE# change 2
0
tAVEL, tAVGL
Address Setup to CE#, OE# Going Low
for Reading Status Register
4, 6 10
tELAX, tGLAX
Address Hold from CE#, OE# Going Low
for Reading Status Register
5, 6 30
tEHEL, tGHGL
CE#, OE# Pulse Width High for Reading
Status Register
6
25
Max. Unit
ns
80
ns
80
ns
35
ns
20
ns
150 ns
20
ns
ns
ns
ns
ns
ns
ns
NOTES:
1. See AC input/output reference waveform for timing measurements and maximum allowable input slew rate.
2. Sampled, not 100% tested.
3. OE# may be delayed up to tELQV tGLQV after the falling edge of CE# without impact to tELQV.
4. Address setup time (tAVEL, tAVGL) is defined from the falling edge of CE# or OE# (whichever goes low last).
5. Address hold time (tELAX, tGLAX) is defined from the falling edge of CE# or OE# (whichever goes low last).
6. Specifications tAVEL, tAVGL, tELAX, tGLAX and tEHEL, tGHGL for read operations apply to only status register read
operations.
Rev. 2.44
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