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LH28F320BFHE-PBTLZ2 View Datasheet(PDF) - Sharp Electronics

Part Name
Description
MFG CO.
LH28F320BFHE-PBTLZ2
Sharp
Sharp Electronics Sharp
'LH28F320BFHE-PBTLZ2' PDF : 36 Pages View PDF
LHF32FD2
25
1.2.5 AC Characteristics - Write Operations(1), (2)
VCC=2.7V-3.6V, TA=-40°C to +85°C
Symbol
tAVAV
tPHWL (tPHEL)
tELWL (tWLEL)
tWLWH (tELEH)
tDVWH (tDVEH)
tAVWH (tAVEH)
tWHEH (tEHWH)
tWHDX (tEHDX)
tWHAX (tEHAX)
tWHWL (tEHEL)
tSHWH (tSHEH)
tVVWH (tVVEH)
tWHGL (tEHGL)
tQVSL
tQVVL
tWHR0 (tEHR0)
Parameter
Write Cycle Time
RST# High Recovery to WE# (CE#) Going Low
CE# (WE#) Setup to WE# (CE#) Going Low
WE# (CE#) Pulse Width
Data Setup to WE# (CE#) Going High
Address Setup to WE# (CE#) Going High
CE# (WE#) Hold from WE# (CE#) High
Data Hold from WE# (CE#) High
Address Hold from WE# (CE#) High
WE# (CE#) Pulse Width High
WP# High Setup to WE# (CE#) Going High
VPP Setup to WE# (CE#) Going High
Write Recovery before Read
WP# High Hold from Valid SRD
VPP Hold from Valid SRD
WE# (CE#) High to SR.7 Going "0"
Notes
3
4
8
8
5
3
3
3, 6
3, 6
3, 7
Min. Max. Unit
80
ns
150
ns
0
ns
55
ns
40
ns
50
ns
0
ns
0
ns
0
ns
25
ns
0
ns
200
ns
30
ns
0
ns
0
ns
tAVQV+ ns
50
NOTES:
1. The timing characteristics for reading the status register during block erase, full chip erase, (page buffer) program and
OTP program operations are the same as during read-only operations. Refer to AC Characteristics for read-only
operations.
2. A write operation can be initiated and terminated with either CE# or WE#.
3. Sampled, not 100% tested.
4. Write pulse width (tWP) is defined from the falling edge of CE# or WE# (whichever goes low last) to the rising edge of
CE# or WE# (whichever goes high first). Hence, tWP=tWLWH=tELEH=tWLEH=tELWH.
5. Write pulse width high (tWPH) is defined from the rising edge of CE# or WE# (whichever goes high first) to the falling
edge of CE# or WE# (whichever goes low last). Hence, tWPH=tWHWL=tEHEL=tWHEL=tEHWL.
6. VPP should be held at VPP=VPPH1/2 until determination of block erase, full chip erase, (page buffer) program or OTP
program success (SR.1/3/4/5=0).
7. tWHR0 (tEHR0) after the Read Query or Read Identifier Codes/OTP command=tAVQV+100ns.
8. Refer to Table 6 for valid address and data for block erase, full chip erase, (page buffer) program, OTP program or lock bit
configuration.
Rev. 2.44
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