LH28F800BJB-PTTL90 View Datasheet(PDF) - Sharp Electronics
Part Name
Description
MFG CO.
'LH28F800BJB-PTTL90' PDF : 47 Pages View PDF
LHF80J21
32
DC Characteristics (Continued)
Sym.
Parameter
VCC=2.7V-3.6V
Notes Min.
Max. Unit
Test Conditions
VIL
Input Low Voltage
VIH
Input High Voltage
7
-0.5
0.8
V
7
2.0
VCC
+0.5
V
VOL
VOH1
VOH2
Output Low Voltage
Output High Voltage
(TTL)
Output High Voltage
(CMOS)
VCCWLK VCCW Lockout during Normal
Operations
3,7
0.4
V
VCC=VCC Min.
IOL=2.0mA
7
2.4
V
VCC=VCC Min.
IOH=-2.0mA
7
0.85
VCC
V
VCC=VCC Min.
IOH=-2.5mA
VCC
-0.4
V
VCC=VCC Min.
IOH=-100µA
4,7
1.0
V
VCCWH1 VCCW during Block Erase, Full Chip
Erase, Word/Byte Write or Lock-Bit
Configuration Operations
2.7
3.6
V
VCCWH2 VCCW during Block Erase, Full Chip
8
Erase, Word/Byte Write or Lock-Bit
11.7
12.3
V
Configuration Operations
VLKO VCC Lockout Voltage
NOTES:
2.0
V
1. All currents are in RMS unless otherwise noted. Typical values at nominal VCC voltage and TA=+25°C.
2. ICCWS and ICCES are specified with the device de-selected. If read or word/byte written while in erase suspend mode, the
device’s current draw is the sum of ICCWS or ICCES and ICCR or ICCW, respectively.
3. Includes RY/BY#.
4. Block erases, full chip erase, word/byte writes and lock-bit configurations are inhibited when VCCW≤VCCWLK, and not
guaranteed in the range between VCCWLK(max.) and VCCWH1(min.), between VCCWH1(max.) and VCCWH2(min.) and
above VCCWH2(max.).
5. The Automatic Power Savings (APS) feature is placed automatically power save mode that addresses not switching more
than 300ns while read mode.
6. About all of pin except describe Test Conditions, CMOS level inputs are either VCC±0.2V or GND±0.2V, TTL level
inputs are either VIL or VIH.
7. Sampled, not 100% tested.
8. Applying 12V±0.3V to VCCW during erase/write can only be done for a maximum of 1000 cycles on each block. VCCW
may be connected to 12V±0.3V for a total of 80 hours maximum.
Rev. 1.27
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