LH540235/45
2048 x 18/4096 x 18 Synchronous FIFOs
TIMING DIAGRAMS (cont’d)
tXI
RXI
tXIS
RCLK
Figure 25. Read-Expansion-In Timing,
IDT-Compatible Operating Mode
540235-19
APPLICATIONS INFORMATION
Standalone Configuration
When depth cascading is not required for a given
application, the LH540235/45 is placed in standalone
mode by tying the two Expansion In pins WXI/WEN2 and
RXI/REN2 to ground, while also holding the First
Load/Retransmit pin FL/RT LOW for the duration of any
reset operation. (See Table 1.) Subsequently, FL/RT may
be taken HIGH at will, whenever a retransmit operation is
desired. If not being used, FL/RT also may be tied to
ground, as shown in Figure 27.
Width Expansion
Word-width expansion is implemented by placing mul-
tiple LH540235/45 devices in parallel. Each device should
be configured for standalone mode, unless the depth of
one single FIFO is not adequate for the application. In this
event, word-width expansion may in principle be used
with either of the two depth-cascading schemes sup-
ported by the LH540235/45 architecture. In practice, the
reliability benefits of interlocked-paralleled operation are
available only with the pipelining scheme, making it the
preferred alternative. (Refer to discussion in a later sec-
tion.)
RESET (RS)
ENHANCED
MODE (EMODE)
WRITE CLOCK (WCLK)
WRITE ENABLE (WEN)
LOAD (LD)
18
DATA IN
FULL FLAG (FF)
PROGRAMMABLE
ALMOST-EMPTY FLAG (PAE)
HALF-FULL FLAG (WXO/HF)
LH540235/45
D[17:0] Q[17:0] 18
READ CLOCK (RCLK)
READ ENABLE (REN)
OUTPUT ENABLE (OE)
DATA OUT
EMPTY FLAG (EF)
PROGRAMMABLE
ALMOST-FULL FLAG (PAF)
FIRST LOAD (FL/RT)
(MUST BE LOW
DURING A RESET
OPERATION)
WRITE EXPANSION IN (WXI/WEN2)
READ EXPANSION IN (RXI/REN2)
BOLD ITALIC = Enhanced Operating Mode.
Figure 26. Standalone FIFO
(2048 × 18 / 4096 × 18)
540235-21
BOLD ITALIC = Enhanced Operating Mode
36