LPC1769 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
'LPC1769' PDF : 79 Pages View PDF
NXP Semiconductors
LPC1769/68/67/66/65/64/63
32-bit ARM Cortex-M3 microcontroller
11.8 USB interface
Remark: The USB controller is available as a device/Host/OTG controller on parts
LPC1769/68/66/65 and as device-only controller on part LPC1764.
Table 16. Dynamic characteristics: USB pins (full-speed)
CL = 50 pF; Rpu = 1.5 kΩ on D+ to VDD(3V3); 3.0 V ≤ VDD(3V3) ≤ 3.6 V.
Symbol
Parameter
Conditions
tr
tf
tFRFM
rise time
fall time
differential rise and fall time
matching
10 % to 90 %
10 % to 90 %
tr / tf
VCRS
tFEOPT
tFDEOP
output signal crossover voltage
source SE0 interval of EOP
see Figure 21
source jitter for differential transition see Figure 21
to SE0 transition
tJR1
tJR2
tEOPR1
receiver jitter to next transition
receiver jitter for paired transitions
EOP width at receiver
10 % to 90 %
must reject as
EOP; see
Figure 21
tEOPR2
EOP width at receiver
must accept as
EOP; see
Figure 21
Min
8.5
7.7
-
1.3
160
−2
−18.5
−9
[1] 40
[1] 82
Typ
Max
Unit
-
13.8
ns
-
13.7
ns
-
109
%
-
2.0
V
-
175
ns
-
+5
ns
-
+18.5 ns
-
+9
ns
-
-
ns
-
-
ns
[1] Characterized but not implemented as production test. Guaranteed by design.
TPERIOD
differential
data lines
crossover point
crossover point
extended
differential data to
SE0/EOP skew
n × TPERIOD + tFDEOP
Fig 21. Differential data-to-EOP transition skew and EOP width
source EOP width: tFEOPT
receiver EOP width: tEOPR1, tEOPR2
002aab561
LPC1769_68_67_66_65_64_63
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 5 April 2011
© NXP B.V. 2011. All rights reserved.
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