LPC1777 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1777
NXP Semiconductors.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
tf
70 %
SDA 30 %
SCL
tf
70 %
30 %
tSU;DAT
70 %
30 %
tHD;DAT
70 %
30 %
S
1 / fSCL
70 %
30 %
tLOW
tHIGH
tVD;DAT
70 %
30 %
002aaf425
Fig 23. I2C-bus pins clock timing
11.8 I2S-bus interface
Table 28. Dynamic characteristics: I2S-bus interface pins
CL = 10 pF, Tamb = 40 C to 85 C, VDD(3V3) = 3.0 V to 3.6 V. Values guaranteed by design.
Symbol Parameter
Conditions
Min Max Unit
common to input and output
tr
rise time
tf
fall time
tWH
pulse width HIGH
[1] -
6.7 ns
[1] -
8.0 ns
on pins I2S_TX_SCK and [1] 25
-
-
I2S_RX_SCK
tWL
pulse width LOW
on pins I2S_TX_SCK and [1] -
I2S_RX_SCK
25
ns
output
tv(Q)
data output valid time
on pin I2S_TX_SDA;
[1] -
6
ns
input
tsu(D)
data input set-up time
on pin I2S_RX_SDA
[1] 5
-
ns
th(D)
data input hold time
on pin I2S_RX_SDA
[1] 2
-
ns
[1] CCLK = 100 MHz; peripheral clock to the I2S-bus interface PCLK = CCLK / 4. I2S clock cycle time Tcy(clk) =
1600 ns, corresponds to the SCK signal in the I2S-bus specification.
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
94 of 126
Share Link: 