LPC1777 View Datasheet(PDF) - NXP Semiconductors.
Part Name
Description
MFG CO.
LPC1777
NXP Semiconductors.
'LPC1777' PDF : 120 Pages View PDF
NXP Semiconductors
LPC178x/7x
32-bit ARM Cortex-M3 microcontroller
12. ADC electrical characteristics
Table 31. 12-bit ADC characteristics
VDDA = 2.7 V to 3.6 V; Tamb = 40 C to +85 C unless otherwise specified.[1]
Symbol Parameter
Conditions
Min
Typ
VIA
analog input voltage
12-bit resolution
0
-
ED
differential linearity
error
[2][3][4] -
-
EL(adj)
integral non-linearity
[2][5] -
-
EO
offset error
[2][6] -
-
EG
gain error
[2][7] -
-
ET
absolute error
[2][8] -
-
fclk(ADC) ADC clock frequency
-
-
fc(ADC)
ADC conversion
single conversion
-
-
frequency
mode
burst mode
-
-
Cia
analog input
capacitance
Rvsi
voltage source
interface resistance
8-bit resolution[10]
ED
differential linearity
error
EL(adj)
EO
EG
ET
fclk(ADC)
fc(ADC)
integral non-linearity
offset error
gain error
absolute error
ADC clock frequency
ADC conversion
frequency
Cia
analog input
capacitance
Rvsi
voltage source
interface resistance
-
-
[9] -
-
[2][3][4] -
1
[2][5] -
1
[2][6] -
1
[2][7] -
1
[2][8] -
-
-
-
-
-
-
-
[9] -
-
Max
VDDA
Unit
V
1
LSB
6
LSB
5
LSB
5
LSB
<8
LSB
12.4
MHz
400
kSa
mple
s/s
375
kSa
mple
s/s
5
pF
1
k
-
LSB
-
-
-
<1.5
36
1.16
5
LSB
LSB
LSB
LSB
MHz
Msa
mple/
s
pF
1
k
[1] VDDA and VREFP should be tied to VDD(3V3) if the ADC and DAC are not used.
[2] Conditions: VSSA = 0 V, VDDA = 3.3 V.
[3] The ADC is monotonic, there are no missing codes.
[4] The differential linearity error (ED) is the difference between the actual step width and the ideal step width.
See Figure 28.
[5] The integral non-linearity (EL(adj)) is the peak difference between the center of the steps of the actual and
the ideal transfer curve after appropriate adjustment of gain and offset errors. See Figure 28.
LPC178X_7X
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 5.5 — 26 April 2016
© NXP Semiconductors N.V. 2016. All rights reserved.
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