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LPC2131 View Datasheet(PDF) - Philips Electronics

Part Name
Description
MFG CO.
'LPC2131' PDF : 41 Pages View PDF
Philips Semiconductors
LPC2131/2132/2134/2136/2138
Single-chip 16/32-bit microcontrollers
6.13 UARTs
The LPC2131/2132/2134/2136/2138 each contain two UARTs. In addition to standard
transmit and receive data lines, the LPC2134/2136/2138 UART1 also provides a full
modem control handshake interface.
6.13.1 Features
16 byte Receive and Transmit FIFOs.
Register locations conform to ‘550 industry standard.
Receiver FIFO trigger points at 1, 4, 8, and 14 bytes
Built-in baud rate generator.
Standard modem interface signals included on UART1. (LPC2134/2136/2138 only)
The LPC2131/2132/2134/2136/2138 transmission FIFO control enables
implementation of software (XON/XOFF) flow control on both UARTs and hardware
(CTS/RTS) flow control on the LPC2134/2136/2138 UART1 only.
6.14 I2C-bus serial I/O controller
The LPC2131/2132/2134/2136/2138 each contain two I2C-bus controllers.
The I2C-bus is bi-directional, for inter-IC control using only two wires: a serial clock line
(SCL), and a serial data line (SDA). Each device is recognized by a unique address and
can operate as either a receiver-only device (e.g., an LCD driver or a transmitter with the
capability to both receive and send information (such as memory)). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I2C-bus is a multi-master bus, it can be
controlled by more than one bus master connected to it.
The I2C-bus implemented in LPC2131/2132/2134/2136/2138 supports bit rates up to
400 kbit/s (Fast I2C).
6.14.1 Features
Standard I2C compliant bus interface.
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I2C-bus may be used for test and diagnostic purposes.
9397 750 14868
Preliminary data sheet
Rev. 02 — 15 April 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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