LPC47N227-MN View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
'LPC47N227-MN' PDF : 202 Pages View PDF
FIFO
MODE
ONLY
BIT 3
0
0
0
1
0
0
Table 29 - Interrupt Control Table
INTERRUPT
IDENTIFICATION
REGISTER
INTERRUPT SET AND RESET FUNCTIONS
PRIORITY INTERRUPT
INTERRUPT
INTERRUPT
BIT 2 BIT 1 BIT 0 LEVEL
TYPE
SOURCE
RESET
CONTROL
0
0
1
-
None
None
-
1
1
0 Highest Receiver Line Overrun Error,
Reading the Line
Status
Parity Error,
Status Register
Framing Error or
Break Interrupt
1
0
0 Second Received Data Receiver Data
Read Receiver
Available
Available
Buffer or the FIFO
drops below the
trigger level.
1
0
0 Second Character
No Characters
Reading the
Timeout
Have Been
Receiver Buffer
Indication
Removed From or Register
Input to the RCVR
FIFO during the
last 4 Char times
and there is at
least 1 char in it
during this time
0
1
0 Third
Transmitter
Transmitter
Reading the IIR
Holding
Holding Register Register (if Source
Register Empty Empty
of Interrupt) or
Writing the
Transmitter
Holding Register
0
0
0 Fourth
MODEM Status Clear to Send or Reading the
Data Set Ready or MODEM Status
Ring Indicator or Register
Data Carrier
Detect
73
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