LPC47N227-MN View Datasheet(PDF) - SMSC -> Microchip
Part Name
Description
MFG CO.
'LPC47N227-MN' PDF : 202 Pages View PDF
Bits 1 to 4 specify which error(s) have occurred. Character error status is handled the same way as
when in the interrupt mode, the IIR is not affected since EIR bit 2=0.
Bit 5 indicates when the XMIT FIFO is empty.
Bit 6 indicates that both the XMIT FIFO and shift register are empty.
Bit 7 indicates whether there are any errors in the RCVR FIFO.
There is no trigger level reached or timeout condition indicated in the FIFO Polled Mode, however, the
RCVR and XMIT FIFOs are still fully capable of holding characters.
DESIRED
BAUD RATE
50
75
110
134.5
150
300
600
1200
1800
2000
2400
3600
4800
7200
9600
19200
38400
57600
115200
230400
460800
Table 30 – Baud Rates
DIVISOR USED TO
GENERATE 16X CLOCK
PERCENT ERROR DIFFERENCE
BETWEEN DESIRED AND ACTUAL1
2304
0.001
1536
-
1047
-
857
0.004
768
-
384
-
192
-
96
-
64
-
58
0.005
48
-
32
-
24
-
16
-
12
-
6
-
3
0.030
2
0.16
1
0.16
32770
0.16
32769
0.16
Note1: The percentage error for all baud rates, except where indicated otherwise, is 0.2%.
Note 2: The High Speed bit is located in the Device Configuration Space.
HIGH
SPEED BIT2
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
X
1
1
80
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