LPC61W492QFP View Datasheet(PDF) - SMSC -> Microchip

Part Name

Description

MFG CO.

LPC61W492QFP

Integrated Super I/O Controller for LPC Bus with Game and MIDI Ports/Plus Hardware Monitoring Functions

SMSC -> Microchip 

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HEAD (Bit 3):

This bit indicates the complement of nHEAD output.

0

side 0

1

side 1

nINDEX (Bit 2):

This bit indicates the value of nINDEX output.

nWP (Bit 1):

0

disk is write-protected

1

disk is not write-protected

DIR (Bit 0)

This bit indicates the direction of head movement.

0

outward direction

1

inward direction

In PS/2 Model 30 mode, the bit definitions for this register are as follows:

7 6 5 4 3 21 0

INIT PENDING (Bit 7):

This bit indicates the value of the floppy disk interrupt output.

DRQ (Bit 6):

This bit indicates the value of DRQ output pin.

STEP F/F (Bit 5):

This bit indicates the complement of latched nSTEP output.

TRAK0 (Bit 4):

This bit indicates the complement of nTRAK0 input.

DIR

WP

INDEX

HEAD

TRAK0

STEP F/F

DRQ

INIT PENDING

35

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