M34C02-LDW1G View Datasheet(PDF) - STMicroelectronics
Part Name
Description
MFG CO.
'M34C02-LDW1G' PDF : 31 Pages View PDF
M34C02-W, M34C02-L, M34C02-R
DC and AC parameters
Table 13. DC Characteristics (M34C02-R)
Symbol
Parameter
Test Condition (in addition to
those in Table 8)
Min.
Max. Unit
ILI
Input Leakage Current
(SCL, SDA, E0, E1 and E2)
VIN = VSS or VCC
± 2 µA
ILO Output Leakage Current
VOUT = VSS or VCC, SDA in Hi-Z
VCC =5V, fc=400kHz
(rise/fall time < 30ns)
± 2 µA
2 mA
ICC Supply Current
VCC =2.5V, fc=400kHz
(rise/fall time < 30ns)
1 mA
VCC =1.8V, fc=400kHz
(rise/fall time < 30ns)
1 mA
ICC1 Stand-by Supply Current
VIN = VSS or VCC , VCC = 5V
VIN = VSS or VCC , 1.8V ≤VCC < 2.5V
1
µA
0.5 µA
VIL Input Low Voltage(1)
VIH Input High Voltage (1)
2.5V ≤VCC ≤5.5V
1.8V ≤VCC < 2.5V
– 0.3 0.3VCC V
– 0.3 0.25VCC V
0.7VCC VCC+1 V
IOL = 3mA, VCC = 5V
0.4 V
VOL Output Low Voltage
IOL = 2.1mA, 2.2V ≤VCC < 2.5V
0.4 V
IOL = 0.15mA, VCC = 1.8V
0.2 V
1. The voltage source driving only E0, E1 and E2 inputs must provide an impedance of less than 1kΩ.
Table 14. AC Characteristics M34C02-W, M34C02-L, M34C02-R)
Test conditions specified in Table 9 and Table 6 or Table 7
Symbol Alt.
Parameter
Min. Max. Unit
fC
fSCL Clock Frequency
400 kHz
tCHCL tHIGH Clock Pulse Width High
600
ns
tCLCH
tDL1DL2(1)
tLOW
tF
Clock Pulse Width Low
SDA Fall Time
1300
ns
20 300 ns
tDXCX tSU:DAT Data In Set Up Time
100
ns
tCLDX tHD:DAT Data In Hold Time
0
ns
tCLQX
tCLQV(2)
tCHDX(3)
tDH
tAA
tSU:STA
Data Out Hold Time
Clock Low to Next Data Valid (Access Time)
Start Condition Set Up Time
200
ns
200 900 ns
600
ns
tDLCL tHD:STA Start Condition Hold Time
600
ns
tCHDH tSU:STO Stop Condition Set Up Time
600
ns
tDHDL
tBUF Time between Stop Condition and Next Start Condition 1300
ns
tW
tWR Write Time
10 ms
1. Sampled only, not 100% tested.
2. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the
falling or rising edge of SDA.
3. For a reSTART condition, or following a Write cycle.
25/31
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