DC and AC parameters
M95256-DR, M95256, M95256-W, M95256-R
Table 19. AC characteristics (M95256-W, device grade 3)
Test conditions specified in Table 11: AC measurement conditions and Table 9: Operating
conditions (M95256-W)
Symbol Alt.
Parameter
fC
fSCK Clock frequency
tSLCH
tCSS1 S active setup time
tSHCH tCSS2 S not active setup time
tSHSL
tCS S deselect time
tCHSH
tCSH S active hold time
tCHSL
tCH (1)
tCL (1)
tCLCH (2)
tCHCL (2)
S not active hold time
tCLH Clock high time
tCLL Clock low time
tRC Clock rise time
tFC Clock fall time
tDVCH
tDSU Data in setup time
tCHDX
tDH Data in hold time
tHHCH
Clock low hold time after HOLD not active
tHLCH
Clock low hold time after HOLD active
tCLHL
Clock low setup time before HOLD active
tCLHH
tSHQZ (2)
Clock low setup time before HOLD not active
tDIS Output disable time
tCLQV
tV Clock low to output valid
tCLQX
tQLQH (2)
tQHQL (2)
tHO Output hold time
tRO Output rise time
tFO Output fall time
tHHQV
tHLQZ (2)
tLZ HOLD high to output valid
tHZ HOLD low to output High-Z
tW
tWC Write time
1. tCH + tCL must never be less than the shortest possible clock period, 1 / fC(max)
2. Value guaranteed by characterization, not tested in production.
Min. Max. Unit
D.C. 5 MHz
90
ns
90
ns
100
ns
90
ns
90
ns
90
ns
90
ns
1
µs
1
µs
20
ns
30
ns
70
ns
40
ns
0
ns
0
ns
100 ns
60 ns
0
ns
50 ns
50 ns
50 ns
100 ns
5 ms
36/48
Doc ID 12276 Rev 11