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ML9092-02 View Datasheet(PDF) - LAPIS Semiconductor Co., Ltd.

Part Name
Description
MFG CO.
ML9092-02
LAPIS
LAPIS Semiconductor Co., Ltd. LAPIS
'ML9092-02' PDF : 66 Pages View PDF
LAPIS Semiconductor
FEDL9092-01
ML9092-01/02/03/04
Power-On Reset
The capacitance of an external capacitor that is connected to the RESET pin must be CRST [F] 12.5 TR [s],
where TR is the rise time taken until the power supply voltage to be supplied to the ML9092-01/02/03/04 reaches
0.9VDD (4.5 V) from 0.1VDD, and CRST is the capacitance of an external capacitor connected to the RESET pin.
(For example, if TR = 10 [ms], then CRST 125 [F])
The pulse width when an external reset signal is input should be TR or more.
Set an instruction at least 10 s after the reset signal reaches 0.85VDD or more.
Thereafter, this IC is accessible.
TR
0.9VDD
(4.5 V)
VDD 0.1VDD
Recommended power supply
voltage (5 V)
RESET
0.85VDD
Accessible time
10 s or more
37/66
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