1
SCK
( CLKPOL = 0 )
Input
SCK
( CLKPOL = 1 )
Input
SS
Input
2
2
3
7
8
MOSI
Input
MISO
Output
5
6
4
Figure 35. Timing Diagram — SPI Slave Mode, Format 1 (CPHA = 1)
1.3.13 MSCAN
The CAN functions are available as RX and TX pins at normal IO pads (I2C1+GPTimer or PSC2). There is no filter for the
WakeUp dominant pulse. Any High-to-Low edge can cause WakeUp, if configured.
1.3.14 I2C
Table 40. I2C Input Timing Specifications—SCL and SDA
Sym
Description
Min
Max
1
Start condition hold time
2
—
2
Clock low time
8
—
4
Data hold time
0.0
—
6
Clock high time
4
—
7
Data setup time
0.0
—
8
Start condition setup time (for repeated start condition
2
—
only )
9
Stop condition setup time
2
—
1 Inter Peripheral Clock is defined in the MPC5200B User’s Manual (MPC5200BUM).
Units
SpecID
IP-Bus Cycle(1) A13.1
IP-Bus Cycle(1) A13.2
ns
A13.3
IP-Bus Cycle(1) A13.4
ns
A13.5
IP-Bus Cycle(1) A13.6
IP-Bus Cycle(1) A13.7
MPC5200B Data Sheet, Rev. 4
Freescale Semiconductor
45