Table 21. Reset electrical characteristics (continued)
Symbol C
Parameter
Conditions1
Value2
Unit
Min Typ Max
VIL SR P Input low Level CMOS
(Schmitt Trigger)
—
0.3
— 0.35VDD V
VHYS CC C Input hysteresis CMOS
(Schmitt Trigger)
—
0.1VDD —
—
V
VOL CC P Output low level
Push Pull, IOL = 2 mA,
—
VDD = 5.0 V ± 10%, PAD3V5V = 0
(recommended)
— 0.1VDD V
Push Pull, IOL = 1 mA,
—
VDD = 5.0 V ± 10%, PAD3V5V = 13
Push Pull, IOL = 1 mA,
—
VDD = 3.3 V ± 10%, PAD3V5V = 1
(recommended)
— 0.1VDD
—
0.5
Ttr CC D Output transition time CL = 25 pF,
—
—
output pin4
VDD = 5.0 V ± 10%, PAD3V5V = 0
MEDIUM configuration CL = 50 pF,
—
—
VDD = 5.0 V ± 10%, PAD3V5V = 0
CL = 100 pF,
—
—
VDD = 5.0 V ± 10%, PAD3V5V = 0
CL = 25 pF,
—
—
VDD = 3.3 V ± 10%, PAD3V5V = 1
CL = 50 pF,
—
—
VDD = 3.3 V ± 10%, PAD3V5V = 1
CL = 100 pF,
—
—
VDD = 3.3 V ± 10%, PAD3V5V = 1
WFRST SR P Reset input filtered pulse
—
—
—
WNFRST SR P Reset input not filtered
pulse
—
1000 —
10 ns
20
40
12
25
40
40 ns
—
ns
|IWPU| CC P Weak pull-up current
VDD = 3.3 V ± 10%, PAD3V5V = 1
10
—
150 µA
absolute value
VDD = 5.0 V ± 10%, PAD3V5V = 0
10
—
150
VDD = 5.0 V ± 10%, PAD3V5V = 15 10
—
250
1 VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified.
2 VDD as mentioned in the table is VDD_HV_A/VDD_HV_B. All values need to be confirmed during device validation.
3 This is a transient configuration during power-up, up to the end of reset PHASE2 (refer to the RGM module section
of the device Reference Manual).
4 CL includes device and package capacitance (CPKG < 5 pF).
5 The configuration PAD3V5 = 1 when VDD = 5 V is only transient configuration during power-up. All pads but
RESET and Nexus output (MDOx, EVTO, MCKO) are configured in input or in high impedance state.
MPC5646C Microcontroller Data Sheet, Rev. 3
54
Preliminary—Subject to Change Without Notice
Freescale Semiconductor