Table 24. Low voltage power domain electrical characteristics
Symbol
C
Parameter
Conditions1
Value
Unit
Min Typ2 Max3
IDDMAX4 CC D RUN mode maximum
average current
—
— 210 3005,6 mA
IDDRUN
CC T RUN mode typical average
current7
T
at 120 MHz
at 80 MHz
TA = 25 °C
TA = 25 °C
— 1758,9 2409,10 mA
1108 15010 mA
IDDHALT CC P HALT mode current11
—
— 25
35 mA
IDDSTOP CC P STOP mode current12
No clocks active TA = 25 °C — 4009 12009,13 µA
P
TA = 150 °C — 109
309 mA
IDDSTDBY3 CC P STANDBY3 mode
(96 KB RAM
current14
retained)
P
No clocks active TA = 25 °C —
TA = 150 °C —
60
1000
175 µA
3000 µA
IDDSTDBY2 CC P STANDBY2 mode
(64 KB RAM
retained)
P current15
No clocks active TA = 25 °C —
45
135 µA
TA = 150 °C — 800 2000 µA
IDDSTDBY1 CC T STANDBY1 mode
(8 KB RAM
current16
retained)
P
No clocks active TA = 25 °C —
25
75 µA
TA = 150 °C — 500 1000 µA
Adders in LP CC T 32 kHz OSC
mode
4–40 MHz OSC
—
TA = 25 °C —
—
5 µA
—
TA = 25 °C —
—
3 mA
16 MHz IRC
—
TA = 25 °C —
—
500 µA
128 kHz IRC
—
TA = 25 °C —
—
5 µA
1 VDD = 3.3 V ± 10% / 5.0 V ± 10%, TA = 40 to 125 °C, unless otherwise specified All temperatures are based on
an ambient temperature.
2 Target typical current consumption for the following typical operating conditions and configuration. Process =
typical, Voltage = 1.2 V.
3 Target maximum current consumption for mode observed under typical operating conditions. Process = Fast,
Voltage = 1.32 V.
4 Running consumption is given on voltage regulator supply (VDDREG). It does not include consumption linked to I/Os
toggling. This value is highly dependent on the application. The given value is thought to be a worst case value with
all cores and peripherals running, and code fetched from code flash while modify operation on-going on data flash.
It is to be noticed that this value can be significantly reduced by application: switch-off not used peripherals (default),
reduce peripheral frequency through internal prescaler, fetch from RAM most used functions, use low power mode
when possible.
5 Higher current may sunk by device during power-up and standby exit. Please refer to in rush current in Table 22.
6 Maximum “allowed” current is package dependent.
7 Only for the “P” classification: Code fetched from RAM: Serial IPs CAN and LIN in loop back mode, DSPI as Master,
PLL as system Clock (4 x Multiplier) peripherals on (eMIOS/CTU/ADC) and running at max frequency, periodic
SW/WDG timer reset enabled. RUN current measured with typical application with accesses on both code flash
and RAM.
8 Subject to change, Configuration: 1 e200z4d + 4 kbit/s Cache, 1 eDMA (32 ch), 4 FlexCAN (2 500 kbit/s,
2 125 kbit/s), 10 LINFlexD (20 kbit/s), 8 DSPI (4 2 Mbit/s, 3 4 Mbit/s, 1 10 Mbit/s), 40 PWM (200 Hz),
40 ADC Input, 1 CTU (40 ch.), 1 FlexRay (2 ch., 10 Mbit/s), 1 RTC, 4 PIT, 1 SWT, 1 STM. Ethernet
and e200z0h disabled. Also reduced timed I/O channels for smaller packages. RUN current measured with typical
application with accesses on both code flash and RAM.
MPC5646C Microcontroller Data Sheet, Rev. 3
Freescale Semiconductor
Preliminary—Subject to Change Without Notice
59