MT28F128J3FS-12F View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT28F128J3FS-12F' PDF : 52 Pages View PDF
READ ARRAY COMMAND
The device defaults to read array mode upon initial
device power-up and after exiting reset/power-down
mode. The read configuration register defaults to asyn-
chronous read page mode. Until another command is
written, the READ ARRAY command also causes the
device to enter read array mode. When the ISM has
started a block erase, program, or lock bit configura-
tion, the device does not recognize the READ ARRAY
command until the ISM completes its operation, un-
less the ISM is suspended via an ERASE or PROGRAM
SUSPEND command. The READ ARRAY command
functions independently of the VPEN voltage.
READ QUERY MODE COMMAND
This section is related to the definition of the data
structure or “data base” returned by the CFI QUERY
command. System software should retain this struc-
ture to gain critical information such as block size,
density, x8/x16, and electrical specifications. When
this information has been obtained, the software
knows which command sets to use to enable Flash
writes or block erases, and otherwise control the Flash
component.
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
QUERY STRUCTURE OUTPUT
The query “data base” enables system software to
obtain information about controlling the Flash compo-
nent. The device’s CFI-compliant interface allows the
host system to access query data. Query data are al-
ways located on the lowest-order data outputs (DQ0–
DQ7) only. The numerical offset value is the address
relative to the maximum bus width supported by the
device. On this family of devices, the query table de-
vice starting address is a 10h, which is a word address
for x16 devices.
For a x16 organization, the first two bytes of the
query structure, “Q” and “R” in ASCII, appear on the
low byte at word addresses 10h and 11h. This CFI-
compliant device outputs 00h data on upper bytes,
thus making the device output ASCII “Q” on the LOW
byte (DQ7–DQ0) and 00h on the HIGH byte (DQ15–
DQ8). At query addresses containing two or more bytes
of information, the least significant data byte is located
at the lower address, and the most significant data
byte is located at the higher address. This is summa-
rized in Table 5. A more detailed example is provided in
Table 6.
Table 5
Summary of Query Structure Output as a Function of Device and Mode
DEVICE
TYPE/
MODE
x16 device
x16 mode
x16 device
x8 mode
QUERY START LOCATION IN
MAXIMUM DEVICE BUS
WIDTH ADDRESSES
10h
N/A1
QUERY DATA WITH
MAXIMUM DEVICE BUS
WIDTH ADDRESSING
HEX
OFFSET
HEX
CODE
ASCII
VALUE
10
0051
Q
11
0052
R
12
0059
Y
N/A1
QUERY DATA WITH BYTE
ADDRESSING
HEX
HEX
ASCII
OFFSET CODE VALUE
20
51
Q
21
00
Null
22
52
R
20
51
Q
21
51
Q
22
52
R
NOTE: 1. The system must drive the lowest-order addresses to access all the device’s array data when the device is configured in
x8 mode. Therefore, word addressing where these lower addresses are not toggled by the system is “Not Applicable”
for x8-configured devices.
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
13
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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