MT28F128J3FS-12F View Datasheet(PDF) - Micron Technology
Part Name
Description
MFG CO.
'MT28F128J3FS-12F' PDF : 52 Pages View PDF
DEVICE GEOMETRY DEFINITION
Tables 11a and 11b provide important details about
the device geometry.
128Mb, 64Mb, 32Mb
Q-FLASH MEMORY
Table 11a
Device Geometry Definitions
OFFSET LENGTH
27h
1
28h
2
2Ah
2
2Ch
1
2Dh
4
DESCRIPTION
“n” such that device size = 2n in number of bytes
Flash device interface: x8 async, x16 async, x8/x16 async;
28:00 29:00, 28:01 29:00, 28:02 29:00
“n” such that maximum number of bytes in write
buffer = 2n
Number of erase block regions within device:
1. x = 0 means no erase blocking; the device erases in “bulk”
2. x specifies the number of device or partition regions
with one or more contiguous same-size erase blocks
3. Symmetrically blocked partitions have one blocking
region
4. Partition size = (total blocks) x (individual block size)
Erase Block Region 1 Information
Bits 0–15 = y; y + 1 = number of identical-size erase blocks
Bits 16–31 = z; region erase block(s) size are z x 256 bytes
CODE
(see table below)
27h
28h
02 x8/x16
29h
00
2Ah
05
32
2Bh
00
2Ch
01
1
2Dh
2Eh
2Fh
30h
Table 11b
Device Geometry Definition Codes
ADDRESS
27h
28h
29h
2Ah
2Bh
2Ch
2Dh
2Eh
2Fh
30h
32Mb
16
02
00
05
00
01
1F
00
00
02
64Mb
17
02
00
05
00
01
3F
00
00
02
128Mb
18
02
00
05
00
01
7F
00
00
02
128Mb, 64Mb, 32Mb Q-Flash Memory
MT28F640J3_7.p65 – Rev. 6, Pub. 8/02
17
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2002, Micron Technology, Inc.
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